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PD - 97034
IRF4905SPbF IRF4905LPBF
Features
Advanced Process Technology Ultra Low On-Resistance 150C Operating Temperature Fast Switching Repetitive Avalanche Allowed up to Tjmax Some Parameters Are Differrent from IRF4905S Lead-Free
HEXFET(R) Power MOSFET
D
VDSS = -55V RDS(on) = 20m
G S
ID = -42A
D
Description
Features of this design are a 150C junction operating temperature, fast switching speed and improved repetitive avalanche rating . These features combine to make this design an extremely efficient and reliable device for use in a wide variety of other applications.
D
G
D
S G D
S
D2Pak IRF4905SPbF
G D
TO-262 IRF4905LPBF
S
Absolute Maximum Ratings
Parameter
Gate
Drain
Max.
-70 -44 -42 -280 170 1.3 20 140 790 See Fig.12a, 12b, 15, 16 -55 to + 150
Source
Units
A
ID @ TC = 25C Continuous Drain Current, VGS @ 10V (Silicon Limited) ID @ TC = 100C Continuous Drain Current, VGS @ 10V (Silicon Limited) ID @ TC = 25C Continuous Drain Current, VGS @ 10V (Package Limited) IDM Pulsed Drain Current
PD @TC = 25C Power Dissipation Linear Derating Factor VGS EAS (Tested ) IAR EAR TJ TSTG Gate-to-Source Voltage Single Pulse Avalanche Energy Tested Value Avalanche CurrentA Repetitive Avalanche Energy Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting Torque, 6-32 or M3 screw EAS (Thermally limited) Single Pulse Avalanche Energyd
W W/C V mJ A mJ C
h
g i
300 (1.6mm from case ) 10 lbfyin (1.1Nym)
Thermal Resistance
RJC RJA Junction-to-Case
j
Parameter
Typ.
Max.
0.75 40
Units
Junction-to-Ambient (PCB Mount, steady state)
ij
--- ---
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1
8/5/05
IRF4905S/L
Electrical Characteristics @ TJ = 25C (unless otherwise specified)
Parameter
V(BR)DSS V(BR)DSS/TJ RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LS Ciss Coss Crss Coss Coss Coss eff. Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance
Min. Typ. Max. Units
-55 --- --- -2.0 19 --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- -0.054 --- --- --- --- --- --- --- 120 32 53 20 99 51 64 7.5 3500 1250 450 4620 940 1530 --- --- 20 -4.0 --- -25 -200 100 -100 180 --- --- --- --- --- --- --- --- --- --- --- --- --- pF nH ns nC nA V m V S A
Conditions
VGS = 0V, ID = -250A VGS = -10V, ID = -42A VDS = -25V, ID = -42A VDS = -55V, VGS = 0V VDS = -44V, VGS = 0V, TJ = 125C VGS = -20V VGS = 20V ID = -42A VDS = -44V VGS = -10V VDD = -28V ID = -42A RG = 2.6 VGS = -10V
V/C Reference to 25C, ID = -1mA
e
VDS = VGS, ID = -250A
e e
Between lead, and center of die contact VGS = 0V VDS = -25V = 1.0MHz VGS = 0V, VDS = -1.0V, = 1.0MHz VGS = 0V, VDS = -44V, = 1.0MHz VGS = 0V, VDS = 0V to -44V
f
Source-Drain Ratings and Characteristics
Parameter
IS ISM VSD trr Qrr ton Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode)A Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time --- --- --- --- 61 150 -1.3 92 220 V ns nC --- --- -280
Min. Typ. Max. Units
--- --- -42 A
Conditions
MOSFET symbol showing the integral reverse p-n junction diode. TJ = 25C, IS = -42A, VGS = 0V di/dt = -100A/s
e
TJ = 25C, IF = -42A, VDD = -28V
e
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
2
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IRF4905S/L
1000
TOP
1000
-ID, Drain-to-Source Current (A)
100
BOTTOM
-ID, Drain-to-Source Current (A)
VGS -15V -10V -8.0V -7.0V -6.0V -5.5V -5.0V -4.5V
TOP
100
BOTTOM
VGS -15V -10V -8.0V -7.0V -6.0V -5.5V -5.0V -4.5V
10
10
-4.5V 60s PULSE WIDTH Tj = 150C
1 0.1 1 10 100 1000
-4.5V
1 0.1 1
60s PULSE WIDTH Tj = 25C
10 100 1000
-VDS , Drain-to-Source Voltage (V)
-VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000.0
40
Gfs, Forward Transconductance (S)
TJ = 25C
-ID, Drain-to-Source Current()
TJ = 25C 30 TJ = 150C 20
100.0
TJ = 150C
10.0
1.0
VDS = -25V
0.1 3 4 5 6 7 8 9 10
10 VDS = -10V 380s PULSE WIDTH 0 0 20 40 60 80 -ID, Drain-to-Source Current (A)
60s PULSE WIDTH
11 12 13 14
-VGS, Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
Fig 4. Typical Forward Transconductance Vs. Drain Current
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3
IRF4905S/L
7000 6000 5000 4000 3000 2000 1000 0 1 10 100 VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, Cds SHORTED Crss = Cgd Coss = Cds + Cgd
20
-VGS, Gate-to-Source Voltage (V)
ID= -42A 16
C, Capacitance (pF)
VDS = -44V VDS= -28V VDS= -11V
Ciss
12
8
Coss
4
Crss
0 0 40 80 120 160 200 QG Total Gate Charge (nC)
-VDS , Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
1000.0
1000
-ID, Drain-to-Source Current (A)
-ISD , Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED BY R DS (on)
100.0
TJ = 150C
10.0
100 1msec
100sec
10msec 10
LIMITED BY PACKAGE
1.0
TJ = 25C
DC Tc = 25C Tj = 150C Single Pulse 1 0 1 10 100
VGS = 0V
0.1 0.0 0.4 0.8 1.2 1.6 2.0
-VSD , Source-to-Drain Voltage (V)
-VDS , Drain-toSource Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRF4905S/L
80 LIMITED BY PACKAGE 60
RDS(on) , Drain-to-Source On Resistance (Normalized)
2.0
ID = -42A
VGS = -10V
-ID , Drain Current (A)
1.5
40
1.0
20
0 25 50 75 100 125 150 TC , Case Temperature (C)
0.5 -60 -40 -20 0 20 40 60 80 100 120 140 160
TJ , Junction Temperature (C)
Fig 9. Maximum Drain Current Vs. Case Temperature
Fig 10. Normalized On-Resistance Vs. Temperature
1
D = 0.50
Thermal Response ( Z thJC )
0.20
0.1
0.10 0.05 0.02 0.01
J R1 R1 J 1 2 R2 R2 R3 R3 3 C 3
Ri (C/W) i (sec) 0.1165 0.000068 0.3734 0.2608 0.002347 0.014811
1
0.01
2
Ci= i/Ri Ci i/Ri
SINGLE PULSE ( THERMAL RESPONSE )
0.001 1E-006 1E-005 0.0001 0.001
Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc
0.01 0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRF4905S/L
VDS
L
600
EAS, Single Pulse Avalanche Energy (mJ)
RG
D.U.T
IAS
-20V
DRIVER
0.01
VDD A
500
tp
ID -17A -30A BOTTOM -42A
TOP
400
300
15V
200
Fig 12a. Unclamped Inductive Test Circuit
I AS
100
0 25 50 75 100 125 150
Starting TJ, Junction Temperature (C)
tp V(BR)DSS
Fig 12b. Unclamped Inductive Waveforms
QG
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
10V
VG
3.6
QGS
QGD
-VGS(th) Gate threshold Voltage (V)
3.2
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator Same Type as D.U.T.
2.8
ID = -250A
50K 12V .2F .3F
2.4
VGS
-3mA
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
6
+
D.U.T.
-
VDS
2.0 -75 -50 -25 0 25 50 75 100 125 150
TJ , Temperature ( C )
Fig 14. Threshold Voltage Vs. Temperature
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IRF4905S/L
1000
Duty Cycle = Single Pulse
100
Avalanche Current (A)
0.01 0.05
10
0.10
Allowed avalanche Current vs avalanche pulsewidth, tav assuming Tj = 25C due to avalanche losses. Note: In no case should Tj be allowed to exceed Tjmax
1
0.1 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current Vs.Pulsewidth
160
EAR , Avalanche Energy (mJ)
120
TOP Single Pulse BOTTOM 1% Duty Cycle ID = -42A
80
40
0 25 50 75 100 125
Starting TJ , Junction Temperature (C)
Notes on Repetitive Avalanche Curves , Figures 15, 16: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 12a, 12b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25C in Figure 15, 16). tav = Average time in avalanche. 150 D = Duty cycle in avalanche = tav *f ZthJC(D, tav) = Transient thermal resistance, see figure 11) PD (ave) = 1/2 ( 1.3*BV*Iav) = DT/ ZthJC Iav = 2DT/ [1.3*BV*Zth] EAS (AR) = PD (ave)*tav
Fig 16. Maximum Avalanche Energy Vs. Temperature
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7
IRF4905S/L
Driver Gate Drive
D.U.T**
+
P.W.
Period
D=
P.W. Period VGS=10V
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
-
-
+
RG
* * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
VDD
VDD
+ -
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
**
Reverse Polarity of D.U.T for P-Channel
* VGS = 5V for Logic Level Devices
Fig 17. Peak Diode Recovery dv/dt Test Circuit for P-Channel HEXFET(R) Power MOSFETs
RD
VDS VGS RG VGS
Pulse Width 1 s Duty Factor 0.1 %
D.U.T.
+
Fig 18a. Switching Time Test Circuit
td(on) tr t d(off) tf
VGS 10%
90% VDS
Fig 18b. Switching Time Waveforms
8
-
VDD
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IRF4905S/L
D2Pak Package Outline (Dimensions are shown in millimeters (inches))
D2Pak Part Marking Information
T HIS IS AN IRF530S WIT H LOT CODE 8024 AS S EMBLED ON WW 02, 2000 IN T HE AS S EMBLY LINE "L" Note: "P" in assembly line position indicates "Lead-Free" INT ERNAT IONAL RECT IFIER LOGO AS S EMBLY LOT CODE PART NUMBER F530S DAT E CODE YEAR 0 = 2000 WEEK 02 LINE L
OR
INT ERNAT IONAL RECT IFIER LOGO AS S EMBLY LOT CODE
PART NUMBER F530S DAT E CODE P = DES IGNAT ES LEAD-FREE PRODUCT (OPT IONAL) YEAR 0 = 2000 WEEK 02 A = AS S EMBLY S IT E CODE
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IRF4905S/L
TO-262 Package Outline (Dimensions are shown in millimeters (inches))
IGBT 1- GATE 2- COLLECTOR 3- EMITTER 4- COLLECTOR
TO-262 Part Marking Information
EXAMPLE: T HIS IS AN IRL3103L LOT CODE 1789 AS SEMBLED ON WW 19, 1997 IN T HE AS SEMBLY LINE "C" Note: "P" in ass embly line pos ition indicates "Lead-Free" INT ERNAT IONAL RECT IFIER LOGO AS S EMBLY LOT CODE PART NUMBER DAT E CODE YEAR 7 = 1997 WEEK 19 LINE C
OR
INT ERNAT IONAL RECT IFIER LOGO AS S EMBLY LOT CODE PART NUMBER DAT E CODE P = DES IGNAT ES LEAD-FREE PRODUCT (OPT IONAL) YEAR 7 = 1997 WEEK 19 A = AS SEMBLY SIT E CODE
10
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IRF4905S/L
D2Pak Tape & Reel Information
TRR
1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153)
1.60 (.063) 1.50 (.059) 0.368 (.0145) 0.342 (.0135)
FEED DIRECTION 1.85 (.073)
1.65 (.065)
11.60 (.457) 11.40 (.449)
15.42 (.609) 15.22 (.601)
24.30 (.957) 23.90 (.941)
TRL
10.90 (.429) 10.70 (.421) 1.75 (.069) 1.25 (.049) 16.10 (.634) 15.90 (.626) 4.72 (.136) 4.52 (.178)
FEED DIRECTION
13.50 (.532) 12.80 (.504)
27.40 (1.079) 23.90 (.941)
4
330.00 (14.173) MAX.
60.00 (2.362) MIN.
NOTES : 1. COMFORMS TO EIA-418. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
30.40 (1.197) MAX.
26.40 (1.039) 24.40 (.961) 3
4
Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive max. junction temperature. (See fig. 11). avalanche performance. Limited by TJmax, starting TJ = 25C, L = 0.16mH This value determined from sample failure population. 100% RG = 25, IAS = -42A, VGS =-10V. Part not tested to this value in production. recommended for use above this value. This is applied to D2Pak, when mounted on 1" square PCB (FR Pulse width 1.0ms; duty cycle 2%. 4 or G-10 Material). For recommended footprint and soldering Coss eff. is a fixed capacitance that gives the techniques refer to application note #AN-994. same charging time as Coss while VDS is rising R is measured at TJ approximately 90C from 0 to 80% VDSS . Repetitive rating; pulse width limited by Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR's Web site.
Notes:
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 08/05
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